I <= Ci ^ Si J <= Cj ^ Sj
Si Sj Ftn Destination
0 ZERO ZERO R <= GCN X-PC 0 1 C C R <= I A, X 1 2 S[] E[] R <= J A, X-I 2 3 N[] W[] R <= I ~& J A, X-J 3 4 Y Y R <= I ~| J Y 4 5 X X R <= I ~^ J X 5 6 B B R <= I ~+ J B 6 7 A A R <= ICAP_C A 7 8 M[] M[] Z <= I M[] 8 9 --- --- MR <= M[] --- 9 10 --- --- MR-SB <= M[] --- 10 11 --- --- memory <= MR --- 11 12 --- --- memory <= MR-SB --- 12 13 --- --- --- --- 13 14 --- --- BSR_PUT --- 14 15 --- --- BSR_GET Nop 15
Dest <= Cr ^ R
These instructions are executed by each PE on the CAAPP Chip in SIMD mode.
Either one or both sources specified by Si and Sj may be complemented before they are used in the operation. The result may also be complemented before it is placed in the destination specified by Destination. The X-PC destination places the result in the X register and pre-charges the Coterie Network.
If Si is N or S or if Sj is E or W, the address field is used to access the operand from the appropriate neighbor PE. Note that it is possible to select and access pairs of neighboring PEs with a single operation by accessing N, S, E, or W. Pairwise access excludes opposing directions. For example, it is not possible to access both North (N) and South (S) at the same time.
Only one address may be specified in an instruction regardless of whether or not both operands or the destination access memory.
For Ftn >= 8, Cr has no effect. And, Destination should be set to 15 to avoid placing garbage into a register.
If the destination is A,X, then both registers receive the same result. If the destination is A,X-I, then the A register receives the result while the X register receives the value specified by I. If the destination is A,X-J, then the A register receives the result while the X register receives the value specified by J. If I or J is A, the value set into X is the value of A before it is modified by the instruction.
The operation may or may not be performed at a particular PE depending on the value of the INH field and the value in the A register.
INH (Inhibit)
0 Non-inhibit --- always active
1 Inhibit if A = 0
2 Inhibit if A = 0 or CAAPP Chip S/N = Some
3 Inhibit if A = 0 or CAAPP Chip S/N = None